An apparatus to perform series and parallel arc fault current interruption (AFCI). The apparatus includes a resistive element configured to sense a load from which a current signal is generated, a first detection unit configured to output a first signal based on the current signal, and a microcontroller configured to decompose at least the first signal via discrete wavelet transforms to thereby obtain discrete wavelet coefficients, and to generate a trip signal when the discrete wavelet coefficients indicate that a threshold condition for trip signal generation are satisfied.