Invention Grant
- Patent Title: Decoding method and decoding circuit
- Patent Title (中): 解码方式和解码电路
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Application No.: US12007861Application Date: 2008-01-16
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Publication No.: US08055985B2Publication Date: 2011-11-08
- Inventor: Takashi Nakagawa
- Applicant: Takashi Nakagawa
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2007-059727 20070309
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
An approach to dividing syndrome calculations into two steps and serially processing them requires a long time for the syndrome calculations with respect to an entire decoding process. Therefore, there is disclosed an error correction decoding circuit for a playing signal having a code sequence having a decoding unit generating first decoded signal and second decoded signal based on the code sequence and an error correction unit performing error correction for the second signal in response to the first signal.
Public/Granted literature
- US20080222497A1 Decoding method and decoding circuit Public/Granted day:2008-09-11
Information query
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