Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US11812291Application Date: 2007-06-18
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Publication No.: US08058694B2Publication Date: 2011-11-15
- Inventor: Hiroshi Shimomura
- Applicant: Hiroshi Shimomura
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2006-168935 20060619
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
In a semiconductor device, such as a MOSFET or the like, which is a high-frequency LSI achieving a low noise figure and a high maximum oscillation frequency and which has unit cells with a ring-shaped gate electrode arranged in an array, gate drawing wires connecting together the gate electrode and gate contact pad portions are arranged on a region excluding a drain region and a source region, that is, on an isolation region. Bending portions of the ring-shaped gate electrode are all formed on the isolation region. This therefore permits an improvement in high frequency characteristics such as noise, the maximum oscillation frequency, and the like while eliminating unnecessary gate capacity addition, and also permits small characteristic variation even if a machining shape of the bending portions of the gate electrode is unstable.
Public/Granted literature
- US20080122014A1 Semiconductor device Public/Granted day:2008-05-29
Information query
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