Invention Grant
US08058917B2 Compensation of phase lock loop (PLL) phase distribution caused by power amplifier ramping
有权
由功率放大器斜坡引起的锁相环（PLL）相位分布补偿
- Patent Title: Compensation of phase lock loop (PLL) phase distribution caused by power amplifier ramping
- Patent Title (中): 由功率放大器斜坡引起的锁相环（PLL）相位分布补偿
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Application No.: US12483708Application Date: 2009-06-12
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Publication No.: US08058917B2Publication Date: 2011-11-15
- Inventor: Thomas Mayer , Rainer Kreienkamp , Jens Kissing
- Applicant: Thomas Mayer , Rainer Kreienkamp , Jens Kissing
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: SpryIP, LLC
- Main IPC: H03L7/06
- IPC: H03L7/06
Abstract:
Disclosed herein are techniques, systems, and methods relating to compensation of phase disturbances of a phase lock-loop during power ramp up or down of a power amplifier. More specifically, a phase lock-loop is described that is able to switch between type I and type II PLL modes depending on the power state of the power amplifier without introducing additional disturbances.
Public/Granted literature
- US20100315140A1 Compensation Of Phase Lock Loop (PLL) Phase Distribution Caused By Power Amplifier Ramping Public/Granted day:2010-12-16
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