A flat panel display device including: a display region including pixels connected to scan lines and data lines; a dummy display region including dummy pixels connected to at least two dummy scan lines and the data lines; a scan driver for providing scan signals and dummy scan signals to the scan lines and the dummy scan lines; a data driver for generating gray scale voltages corresponding to input digital data and providing them to corresponding pixels through the data lines; and a timing controller for controlling the scan driver and the data driver, wherein the data driver uses parasitic capacitance components existing in at least two data lines and capacitance components in the pixels and the dummy pixels connected to the at least two data lines, as a sampling capacitor and a holding capacitor to generate the gray scale voltages through charge sharing between the at least two data lines.