Invention Grant
US08065504B2 Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor
有权
使用由指令地址索引的片上和片外查找表来控制处理器中的指令执行
- Patent Title: Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor
- Patent Title (中): 使用由指令地址索引的片上和片外查找表来控制处理器中的指令执行
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Application No.: US11004729Application Date: 2004-12-02
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Publication No.: US08065504B2Publication Date: 2011-11-22
- Inventor: John S. Yates, Jr. , David L. Reese , Paul H. Hohensee , Korbin S. Van Dyke , Shalesh Thusoo , Tiruvur R. Ramesh
- Applicant: John S. Yates, Jr. , David L. Reese , Paul H. Hohensee , Korbin S. Van Dyke , Shalesh Thusoo , Tiruvur R. Ramesh
- Applicant Address: BB Hastings
- Assignee: ATI International SRL
- Current Assignee: ATI International SRL
- Current Assignee Address: BB Hastings
- Agency: Volpe and Koenig P.C.
- Main IPC: G06F9/30
- IPC: G06F9/30

Abstract:
A microprocessor chip has instruction pipeline circuitry, and instruction classification circuitry that classifies instructions as they are executed into a small number of classes and records a classification code value. An on-chip table has entries corresponding to a range of addresses of a memory and designed to hold a statistical assessment of a value of consulting an off-chip table in a memory of the computer. Lookup circuitry is designed to fetch an entry from the on-chip table as part of the basic instruction processing cycle of the microprocessor. A mask has a value set at least in part by a timer. The instruction pipeline circuitry is controlled based on the value of the on-chip table entry corresponding to the address of instructions processed, the current value of the mask, the recorded classification code, and the off-chip table.
Public/Granted literature
- US20050086451A1 Table look-up for control of instruction execution Public/Granted day:2005-04-21
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