Invention Grant
US08065542B2 Distributed table-driven power mode computation for controlling optimal clock and voltage switching
有权
分布式表驱动功率模式计算，用于控制最佳时钟和电压切换
- Patent Title: Distributed table-driven power mode computation for controlling optimal clock and voltage switching
- Patent Title (中): 分布式表驱动功率模式计算，用于控制最佳时钟和电压切换
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Application No.: US12347008Application Date: 2008-12-31
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Publication No.: US08065542B2Publication Date: 2011-11-22
- Inventor: Pieter Struik
- Applicant: Pieter Struik
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Jones Day
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/26 ; H02J1/10 ; H02J3/14 ; G01R21/00 ; G01R19/00
Abstract:
A method for computing the optimal power mode for a system-on-chip (SoC) in which both the clock and Vdd settings are controlled. Information from hardware blocks is synthesized into a global power mode for the entire SoC. The clocks can be disabled or enabled, and Vdd voltages can be disabled, set at a nominal operating level, and set at a retention level in which the state of memory and registers is retained.
Public/Granted literature
- US20100169680A1 DISTRIBUTED TABLE-DRIVEN POWER MODE COMPUTATION FOR CONTROLLING OPTIMAL CLOCK and VOLTAGE SWITCHING Public/Granted day:2010-07-01
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