Invention Grant
- Patent Title: Integrated circuit package system with planar interconnects
- Patent Title (中): 具有平面互连的集成电路封装系统
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Application No.: US11162629Application Date: 2005-09-16
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Publication No.: US08067831B2Publication Date: 2011-11-29
- Inventor: Hyeog Chan Kwon , Tae Sung Jeong , Jae Han Chung , Taeg Ki Lim , Jong Wook Ju
- Applicant: Hyeog Chan Kwon , Tae Sung Jeong , Jae Han Chung , Taeg Ki Lim , Jong Wook Ju
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agent Mikio Ishimaru
- Main IPC: H01L23/48
- IPC: H01L23/48
Abstract:
An integrated circuit package system is provided including forming a first substrate, mounting a first integrated circuit to the first substrate, and forming first planar interconnects in contact with the first integrated circuit and electrically connecting the first integrated circuit to the first substrate.
Public/Granted literature
- US20070063331A1 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PLANAR INTERCONNECTS Public/Granted day:2007-03-22
Information query
IPC分类:
