Invention Grant
- Patent Title: Metallization structure over passivation layer for IC chip
- Patent Title (中): IC芯片钝化层金属化结构
-
Application No.: US11157186Application Date: 2005-06-17
-
Publication No.: US08067837B2Publication Date: 2011-11-29
- Inventor: Mou-Shiung Lin
- Applicant: Mou-Shiung Lin
- Applicant Address: TW Hsinchu
- Assignee: Megica Corporation
- Current Assignee: Megica Corporation
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Priority: TW93128389A 20040920
- Main IPC: H01L23/48
- IPC: H01L23/48
Abstract:
A semiconductor chip suited for being electrically connected to a circuit element includes a line and a bump. The bump is connected to the line and is adapted to be electrically connected to the line. A plane that is horizontal to an active surface of the semiconductor chip is defined. The area that the connection region of the line and the bump is projected on the plane is larger than 30,000 square microns or has an extension distance larger than 500 microns.
Public/Granted literature
- US20060125094A1 Solder interconnect on IC chip Public/Granted day:2006-06-15
Information query
IPC分类:
