A method for digital phase detection, comprises the steps of: providing a reference clock; receiving a feedback clock; determining a timing difference between the reference clock and the feedback clock; determining a polarity that indicates the leading or lagging relationship between the reference clock and the feedback clock; adaptively selecting one of at least two operating modes for generating a quantized level indicative of the timing difference, wherein in a first operating mode the quantized level is a constant maximum value and wherein in a second operating mode the quantized level is proportional to the timing difference; and generating a digital phase detection output as a combination of the polarity and the quantized level.