Invention Grant
US08081534B2 Automatic scrambling of input/output data according to row addresses in a semiconductor memory device
失效
根据半导体存储器件中的行地址对输入/输出数据进行自动加扰
- Patent Title: Automatic scrambling of input/output data according to row addresses in a semiconductor memory device
- Patent Title (中): 根据半导体存储器件中的行地址对输入/输出数据进行自动加扰
-
Application No.: US12490630Application Date: 2009-06-24
-
Publication No.: US08081534B2Publication Date: 2011-12-20
- Inventor: Seung-Bong Kim
- Applicant: Seung-Bong Kim
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2009-0043684 20090519
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A semiconductor memory device is capable of scrambling input/output data according to row addresses. The semiconductor memory device includes a local line driving block configured to differentially drive a positive local line and a negative local line by selectively inverting data on a global line according to row addresses, a global line driving block configured to drive the global line by selectively inverting data on the positive local line and data on the negative local line according to the row addresses, a first cell region configured to allow a first internal data to be equalized with the data on the positive local line in response to the row addresses and column addresses, and a second cell region configured to allow a second internal data to be equalized with the data on the negative local line in response to the row addresses and the column addresses.
Public/Granted literature
- US20100296357A1 Semiconductor Memory Device Public/Granted day:2010-11-25
Information query