Invention Grant
- Patent Title: Method for reducing pin counts and microprocessor using the same
- Patent Title (中): 减少引脚数和减少微处理器的方法
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Application No.: US12414354Application Date: 2009-03-30
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Publication No.: US08082417B2Publication Date: 2011-12-20
- Inventor: Jiann-Jong Tsai
- Applicant: Jiann-Jong Tsai
- Applicant Address: TW Hsinchu
- Assignee: Sunplus mMedia Inc.
- Current Assignee: Sunplus mMedia Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Muncy, Geissler, Olds & Lowe, PLLC
- Priority: TW97116734A 20080507
- Main IPC: G06F12/02
- IPC: G06F12/02
Abstract:
The present invention relates to a microprocessor with reduced pin counts. The microprocessor transmits a higher bit address, a lower bit address and data via a common port so that a pin for transmitting the higher bit address is omitted. In an embodiment of the present invention, a new higher bit address latching signal is added in order to latch the higher bit address so that an original lower bit address latching signal and the higher bit address latching signal can respectively latch the lower bit address and the higher bit address.
Public/Granted literature
- US20090282219A1 METHOD FOR REDUCING PIN COUNTS AND MICROPROCESSOR USING THE SAME Public/Granted day:2009-11-12
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