A digital to analog converter (DAC) method and apparatus employs a multiplying-adding DAC, eliminating digital adder circuitry. Examples are given for multiplying a 3-bit binary number by a 2-bit binary number; however, there are no limitations to the bit-widths of the numbers to be multiplied. The multiplying-adding DAC method can be scaled up or down in bit-width by feeding the DAC with partial sums and adjusting the DAC weights accordingly. An analog to digital converter (ADC) can be placed after the DAC to generate a digital output. By multiplexing preset digital data into the DAC core for return to zero (RTZ), a true zero that is the midpoint of the DAC output range is achieved. It does not return to a rail for single-ended outputs. RTZ in DAC circuits doubles the null frequency of sin(x)/x roll-off inherent in DACs and also helps reduce switching glitches in the DAC output.