Invention Grant
- Patent Title: Reading technique for memory cell with electrically floating body transistor
- Patent Title (中): 具有电浮体晶体管的存储单元的读取技术
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Application No.: US12130011Application Date: 2008-05-30
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Publication No.: US08085594B2Publication Date: 2011-12-27
- Inventor: Serguei Okhonin , Mikhail Nagoga , Cedric Bassin
- Applicant: Serguei Okhonin , Mikhail Nagoga , Cedric Bassin
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wilmer Cutler Pickering Hale and Dorr LLP
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
A semiconductor device along with circuits including the same and methods of operating the same are described. The device comprises a memory cell consisting essentially of one transistor. The transistor comprises a gate, an electrically floating body region, and a source region and a drain region adjacent the body region. The device includes data sense circuitry coupled to the memory cell. The data sense circuitry comprises a word line coupled to the gate region and a bit output coupled to the source region or the drain region.
Public/Granted literature
- US20090016101A1 Reading Technique for Memory Cell With Electrically Floating Body Transistor Public/Granted day:2009-01-15
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