Invention Grant
US08086921B2 System and method of clocking an IP core during a debugging operation
有权
在调试操作期间对IP核进行计时的系统和方法
- Patent Title: System and method of clocking an IP core during a debugging operation
- Patent Title (中): 在调试操作期间对IP核进行计时的系统和方法
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Application No.: US12700227Application Date: 2010-02-04
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Publication No.: US08086921B2Publication Date: 2011-12-27
- Inventor: Greg Bensinger , Jean-Marc Brault , Hans Erich Multhaup
- Applicant: Greg Bensinger , Jean-Marc Brault , Hans Erich Multhaup
- Applicant Address: US OR Wilsonville
- Assignee: Mentor Graphics Corporation
- Current Assignee: Mentor Graphics Corporation
- Current Assignee Address: US OR Wilsonville
- Agency: Banner & Witcoff, Ltd
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G06F11/00
Abstract:
According to the invention, an IP core is clocked during a debugging operation by switching from the clock used for testing the device under test to a clock oscillator or any other free-running clock source.
Public/Granted literature
- US20100313058A1 System and Method of Clocking an IP Core During a Debugging Operation Public/Granted day:2010-12-09
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