Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source/drain and semiconductor device manufactured by the method

Invention Grant

US08088666B2 Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source/drain and semiconductor device manufactured by the method 有权

Title translation: 半导体器件制造方法包括独立于源极/漏极以及通过该方法制造的半导体器件将杂质注入栅电极的工艺

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Patent Title: Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source/drain and semiconductor device manufactured by the method
Patent Title (中): 半导体器件制造方法包括独立于源极/漏极以及通过该方法制造的半导体器件将杂质注入栅电极的工艺
Application No.: US11898830

Application Date: 2007-09-17
Publication No.: US08088666B2

Publication Date: 2012-01-03
Inventor: Yasuhiro Sambonsugi , Hikaru Kokura
Applicant: Yasuhiro Sambonsugi , Hikaru Kokura
Applicant Address: JP Yokohama
Assignee: Fujitsu Semiconductor Limited
Current Assignee: Fujitsu Semiconductor Limited
Current Assignee Address: JP Yokohama
Agency: Westerman, Hattori, Daniels & Adrain, LLP
Priority: JP2001-358754 20011126; JP2002-314613 20021029
Main IPC: H01L21/336
IPC: H01L21/336

Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source/drain and semiconductor device manufactured by the method

Abstract:

A gate electrode made of semiconductor is formed on the partial surface area of a semiconductor substrate. A mask member is formed on the surface of the semiconductor substrate in an area adjacent to the gate electrode. Impurities are implanted into the gate electrode. After impurities are implanted, the mask member is removed. Source and drain regions are formed by implanting impurities into the surface layer of the semiconductor substrate on both sides of the gate electrode. It is possible to reduce variations of cross sectional shape of gate electrodes and set an impurity concentration of the gate electrode independently from an impurity concentration of the source and drain regions.

Abstract(Chinese):

在半导体衬底的部分表面区域上形成由半导体制成的栅电极。在与栅电极相邻的区域中的半导体衬底的表面上形成掩模构件。将杂质植入栅电极。植入杂质后，去除掩模构件。通过在栅电极的两侧将杂质注入到半导体衬底的表面层中形成源区和漏区。可以减小栅电极的横截面形状的变化，并且独立于源区和漏区的杂质浓度设定栅电极的杂质浓度。

Public/Granted literature

US20080311721A1 Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source/drain and semiconductor device manufactured by the method Public/Granted day:2008-12-18

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/334	....制造单极型器件的台阶式工艺
H01L21/335	.....场效应晶体管
H01L21/336	......带有绝缘栅的