Invention Grant
US08088687B2 Method for forming copper line having self-assembled monolayer for ULSI semiconductor devices
有权
用于形成具有用于ULSI半导体器件的自组装单层的铜线的方法
- Patent Title: Method for forming copper line having self-assembled monolayer for ULSI semiconductor devices
- Patent Title (中): 用于形成具有用于ULSI半导体器件的自组装单层的铜线的方法
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Application No.: US12491826Application Date: 2009-06-25
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Publication No.: US08088687B2Publication Date: 2012-01-03
- Inventor: Seung Jin Yeom , Jae Hong Kim , Sung Goon Kang , Won Kyu Han
- Applicant: Seung Jin Yeom , Jae Hong Kim , Sung Goon Kang , Won Kyu Han
- Applicant Address: KR Gyeonggi-do KR Seoul
- Assignee: Hynix Semiconductor Inc.,IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
- Current Assignee: Hynix Semiconductor Inc.,IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
- Current Assignee Address: KR Gyeonggi-do KR Seoul
- Agency: Ladas & Parry LLP
- Priority: KR10-2009-0027416 20090331
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A copper line having self assembled monolayer for use in ULSI semiconductor devices and methods of making the same are presented. The copper line includes an interlayer dielectric, a self-assembled monolayer, catalytic particles on the monolayer, and a copper layer on the monolayer with the catalytic particles. The method includes the steps of forming an interlayer dielectric on a semiconductor substrate having a metal line forming region; forming a self-assembled monolayer on the metal line forming region; adsorbing catalytic particles on the self-assembled monolayer; forming using an electroless process a copper seed layer on the self-assembled monolayer having the catalytic particles adsorbed thereto; and forming a copper layer on the copper seed layer to fill in the metal line forming region.
Public/Granted literature
- US20100244253A1 COPPER LINE HAVING SELF-ASSEMBLED MONOLAYER FOR ULSI SEMICONDUCTOR DEVICES, AND A METHOD OF FORMING SAME Public/Granted day:2010-09-30
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