Invention Grant
- Patent Title: Thin-film transistor panel having structure that suppresses characteristic shifts and method for manufacturing the same
- Patent Title (中): 具有抑制特性偏移的结构的薄膜晶体管面板及其制造方法
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Application No.: US11582886Application Date: 2006-10-18
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Publication No.: US08089068B2Publication Date: 2012-01-03
- Inventor: Hiromitsu Ishii
- Applicant: Hiromitsu Ishii
- Applicant Address: JP Tokyo
- Assignee: Casio Computer Co., Ltd.
- Current Assignee: Casio Computer Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz, Goodman & Chick, PC
- Priority: JP2005-305140 20051020
- Main IPC: H01L29/04
- IPC: H01L29/04 ; H01L29/10

Abstract:
A thin-film transistor panel includes a substrate, and a thin-film transistor formed on the substrate. The transistor includes a gate electrode, a gate insulating film, a semiconductor thin film, first and second ohmic contact layers formed on the semiconductor thin film, and source and drain electrodes which are respectively formed on the first and second ohmic contact layers. The semiconductor thin film includes a channel area between the source electrode and the drain electrode. A pixel electrode is connected to the source electrode of the thin-film transistor. First and second conductive coating films are provided on the source and drain electrodes, respectively, and formed of the same material as the pixel electrode. The first conductive coating film is wider than the source electrode, and the second conductive coating film is wider than the drain electrode.
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