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US08089486B2 Tiled prefetched and cached depth buffer 有权
平铺预取和缓存深度缓冲区

Tiled prefetched and cached depth buffer
Abstract:
A 3D graphics pipeline includes a prefetch mechanism that feeds a cache of depth tiles. The prefetch mechanism may be predictive, using triangle geometry information from previous pipeline stages to pre-charge the cache, thereby allowing for an increase in memory bandwidth efficiency. A z-value compression technique may be optionally utilized to allow for a further reduction in power consumption and memory bandwidth.
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