Invention Grant
US08089490B2 Correction arithmetic circuit 有权
校正算术电路

Correction arithmetic circuit
Abstract:
A plurality of one-port split lookup tables having alternately stored therein correction data corresponding to input data is provided as a lookup table that has stored therein the correction data corresponding to the input data at predetermined intervals relevant to predetermined higher-order bits. An address generating unit generates addresses for a plurality of the corresponding split lookup tables from the input data. An interpolation arithmetic unit executes interpolation arithmetic with the use of lower-order bits of the input data for readout data read from two lookup tables.
Public/Granted literature
Information query
Patent Agency Ranking
0/0