Invention Grant
- Patent Title: Electrostatic discharge protection circuit
- Patent Title (中): 静电放电保护电路
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Application No.: US12438460Application Date: 2007-10-30
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Publication No.: US08089739B2Publication Date: 2012-01-03
- Inventor: Dipankar Bhattacharya , Makeshwar Kothandaraman , John C. Kriz , Bernard L. Morris , Yehuda Smooha
- Applicant: Dipankar Bhattacharya , Makeshwar Kothandaraman , John C. Kriz , Bernard L. Morris , Yehuda Smooha
- Applicant Address: US PA Allentown
- Assignee: Agere Systems Inc.
- Current Assignee: Agere Systems Inc.
- Current Assignee Address: US PA Allentown
- Agency: Ryan, Mason & Lewis, LLP
- International Application: PCT/US2007/082934 WO 20071030
- International Announcement: WO2009/058128 WO 20090507
- Main IPC: H02H3/22
- IPC: H02H3/22 ; H02H3/20 ; H02H9/04

Abstract:
An ESD protection circuit includes a first voltage clamp, connected between a first voltage supply node and a second voltage supply node of the circuit, and a second voltage clamp, connected between the second voltage supply node and a voltage return of the circuit. The first voltage supply node is adapted to receive a first voltage which is greater than a prescribed gate oxide reliability potential of the circuit. The second voltage supply node is operative to receive a second voltage which is less than the first voltage. The first voltage clamp is operative to clamp the first voltage on the first voltage supply node to a first value during an ESD event between the first and second voltage supply nodes, and the second voltage clamp is operative to clamp the second voltage on the second voltage supply node to a second value during an ESD event between the second voltage supply node and the voltage return.
Public/Granted literature
- US20100232078A1 Electrostatic Discharge Protection Circuit Public/Granted day:2010-09-16
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