A system module includes a plurality of processors, and a system controller that is connected to the processors via a first transmission line and relays a packet from each of the processors to another system module via a second transmission line in a multiprocessor system. The system controller includes a data transmission controller that, when part of packets constituting a series of data is not received normally from a processor due to a fault in the processor or the first transmission line, generates a supplement packet for a packet that has not been received normally and outputs the supplement packet to the second transmission line.