Invention Grant
- Patent Title: Data read-out circuit in semiconductor memory device and method of data reading in semiconductor memory device
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Application No.: US11834426Application Date: 2007-08-06
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Publication No.: US08091008B2Publication Date: 2012-01-03
- Inventor: Satoru Oku
- Applicant: Satoru Oku
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2006-226502 20060823
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
A data read-out circuit is provided with a sense amplifier circuit and a selector. The sense amplifier circuit senses a stored data stored in a memory cell array by using a plurality of reference levels to generate a plurality of read data, respectively. Thus, the sense amplifier circuit outputs the plurality of read data with regard to the stored data. The selector selects a data corresponding to any one of the plurality of read data based on a control signal and outputs the selected data as an output data.
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