Invention Grant
- Patent Title: Logic circuits having dynamically configurable logic gate arrays
- Patent Title (中): 逻辑电路具有动态可配置的逻辑门阵列
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Application No.: US12174332Application Date: 2008-07-16
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Publication No.: US08091062B2Publication Date: 2012-01-03
- Inventor: William L. Ditto , Krishnamurthy Murali , Sudeshna Sinha
- Applicant: William L. Ditto , Krishnamurthy Murali , Sudeshna Sinha
- Applicant Address: US FL Gainesville
- Assignee: University of Florida Research Foundation, Inc.
- Current Assignee: University of Florida Research Foundation, Inc.
- Current Assignee Address: US FL Gainesville
- Agency: Fleit Gibbons Gutman Bongini & Bianco PL
- Agent Jon A. Gibbons
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A logic gate array for implementing logical expressions is provided. The array includes a dynamically configurable logic gate having a chaotic updater for causing the logic gate to alternately operate as one of a several different logic gate types, the dynamically configurable logic gate alternating from operating as one logic gate type to a different logic gate type in response to one or more reference signals. The array also includes one or more additional logic gates.
Public/Granted literature
- US20080278196A1 LOGIC CIRCUITS HAVING DYNAMICALLY CONFIGURABLE LOGIC GATE ARRAYS Public/Granted day:2008-11-13
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