Invention Grant
US08093130B2 Method of manufacturing a semiconductor device having raised source and drain of differing heights
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制造具有不同高度的源极和漏极的半导体器件的制造方法
- Patent Title: Method of manufacturing a semiconductor device having raised source and drain of differing heights
- Patent Title (中): 制造具有不同高度的源极和漏极的半导体器件的制造方法
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Application No.: US12022363Application Date: 2008-01-30
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Publication No.: US08093130B2Publication Date: 2012-01-10
- Inventor: Keizo Kawakita
- Applicant: Keizo Kawakita
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2007-021777 20070131
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
This semiconductor device has an MOS transistor equipped with a gate electrode formed on a semiconductor substrate, a source region next to one side of the gate electrode, and a drain region next to another side of the gate electrode, wherein an upper end of the source region and an upper end of the drain region are at positions which are higher than a top surface of the semiconductor substrate, and the height of the upper end of the drain region differs from the height of the upper end of the source region.
Public/Granted literature
- US20080179650A1 SEMICONDUCTOR DEVICE, FABRICATION METHOD OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2008-07-31
Information query
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