Invention Grant
- Patent Title: Integrated circuit package-in-package system with side-by-side and offset stacking and method for manufacturing thereof
- Patent Title (中): 具有并排和偏移堆叠的集成电路封装包装系统及其制造方法
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Application No.: US12871031Application Date: 2010-08-30
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Publication No.: US08093727B2Publication Date: 2012-01-10
- Inventor: Soo-San Park , BumJoon Hong , Sang-Ho Lee , Jong-Woo Ha
- Applicant: Soo-San Park , BumJoon Hong , Sang-Ho Lee , Jong-Woo Ha
- Applicant Address: SG Singapore
- Assignee: STATS Chippac Ltd.
- Current Assignee: STATS Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agent Mikio Ishimaru
- Main IPC: H01L23/538
- IPC: H01L23/538

Abstract:
A method for manufacturing of an integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; connecting the integrated circuit package system and the substrate; and forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.
Public/Granted literature
Information query
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