Invention Grant
US08093927B2 Semiconductor device including a test circuit of a multivalued logic circuit having an impedance control
有权
包括具有阻抗控制的多值逻辑电路的测试电路的半导体器件
- Patent Title: Semiconductor device including a test circuit of a multivalued logic circuit having an impedance control
- Patent Title (中): 包括具有阻抗控制的多值逻辑电路的测试电路的半导体器件
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Application No.: US12654286Application Date: 2009-12-16
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Publication No.: US08093927B2Publication Date: 2012-01-10
- Inventor: Yoshitomo Numaguchi , Munehisa Okita
- Applicant: Yoshitomo Numaguchi , Munehisa Okita
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn Intellectual Property Law Group, PLLC
- Priority: JP2009-045331 20090227
- Main IPC: H03K3/00
- IPC: H03K3/00

Abstract:
A semiconductor device, having a test circuit of a multivalued logic circuit without newly provision of an output terminal for a test signal, and with no increase in transmission delay in an output signal, includes an n-valued input terminal, and comparators that operate at different threshold voltages in response to input signals which have been input to the n-valued input terminal, respectively, and also includes an impedance control circuit that is connected to the n-valued input terminal and outputs of the comparators, respectively, and changes a combine resistance value in response to the output signals of the comparators to change a current flowing in the n-valued input terminal.
Public/Granted literature
- US20100219872A1 Semiconductor device Public/Granted day:2010-09-02
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