Invention Grant
- Patent Title: Logic circuit
- Patent Title (中): 逻辑电路
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Application No.: US13004480Application Date: 2011-01-11
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Publication No.: US08093935B2Publication Date: 2012-01-10
- Inventor: Haruo Kawakami
- Applicant: Haruo Kawakami
- Applicant Address: JP Kawasaki-shi
- Assignee: Fuji Electric Co., Ltd.
- Current Assignee: Fuji Electric Co., Ltd.
- Current Assignee Address: JP Kawasaki-shi
- Agency: Rabin & Berdo, P.C.
- Main IPC: H03K3/02
- IPC: H03K3/02 ; H03K3/33 ; H03K3/00

Abstract:
A logic circuit includes two two-terminal switching devices and receives first and second pulses as inputs. Each of the two devices has two different stable resistivity values for each applied voltage that is greater than a first threshold voltage (Vth1) and is smaller than a second threshold voltage (Vth2) that is larger than Vth1. Each switching device, when a voltage less than or equal to Vth1 is applied, becomes in a first state having the higher resistivity of the two resistivity values, whereas when a voltage more than or equal to Vth2 is applied, becomes in a second state having the lower resistivity of the two resistivity values. The two devices are connected in series in a direction with uniform polarity to each other. The first and second states are selectively generated in the first and second devices by a combination of inputs of the first and second pulses.
Public/Granted literature
- US20110109345A1 LOGIC CIRCUIT Public/Granted day:2011-05-12
Information query
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