A nonvolatile memory device includes a data memory cell array having multi level memory cells divided into two groups, a write sequence memory cell array configured to store a write sequence indicating in which of the two groups the multi level data was written first, and a write time memory cell array configured to store the number of write operations performed on the memory cells. The memory device further includes a control circuit configured to control a program operation by determining allocation of data corresponding to a minimum physical voltage distribution causing a reaction of the memory cells, such that a shift of a first minimum physical voltage causing a reaction due to the first write operation and a shift of a second minimum physical voltage causing a reaction due to the second write operation are equal regardless of write sequence.