Invention Grant
- Patent Title: Memory block testing
- Patent Title (中): 内存块测试
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Application No.: US12509739Application Date: 2009-07-27
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Publication No.: US08094508B2Publication Date: 2012-01-10
- Inventor: Scott N. Gatzemeier , Joemar Sinipete , Nevil Gajera , Mark Hawes
- Applicant: Scott N. Gatzemeier , Joemar Sinipete , Nevil Gajera , Mark Hawes
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: G11C7/00
- IPC: G11C7/00
Abstract:
A memory block of a memory device is tested by programming a plurality of pages of the memory block, passing the memory block if a number of pages, each programmed in a first programming time, is greater than or equal to a first predetermined number and a number of pages, each programmed in a second programming time, is less than or equal to a second predetermined number, and failing the memory block if a programming time of any one of the pages exceeds a predetermined programming time or if the number of pages programmed in the first programming time is less than the first predetermined number or if the number of pages programmed in the second programming time exceeds the second predetermined number.
Public/Granted literature
- US20090290441A1 MEMORY BLOCK TESTING Public/Granted day:2009-11-26
Information query
