Invention Grant
- Patent Title: Adaptive clock method and system
- Patent Title (中): 自适应时钟方法和系统
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Application No.: US12571056Application Date: 2009-09-30
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Publication No.: US08094683B2Publication Date: 2012-01-10
- Inventor: Yoshio Shirasaki
- Applicant: Yoshio Shirasaki
- Applicant Address: US CA Sunnyvale
- Assignee: Juniper Networks, Inc.
- Current Assignee: Juniper Networks, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Harrity & Harrity, LLP
- Priority: JP2001-157185 20010525
- Main IPC: H04J3/24
- IPC: H04J3/24

Abstract:
A device and method are disclosed for correctly restoring a read clock when there are a plurality of STM data stream transmission sources. In a CES device of an ATM communication system, ATM cells from respective connections, which are to be delivered to the same outgoing line, are accumulated in a reassembly buffer memory and a PLO control unit aggregates the amount of ATM cells accumulated in the reassembly buffer memory for each connection. Subsequently, the PLO control unit calculates the frequency of a read clock based on the amount of accumulated ATM cells for each connection. A PLO restores the read clock which is applied to read data from the reassembly buffer memory for delivery to an STM network.
Public/Granted literature
- US20100014524A1 ADAPTIVE CLOCK METHOD AND SYSTEM Public/Granted day:2010-01-21
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