Invention Grant
- Patent Title: Method and apparatus for modeling source-drain current of thin film transistor
- Patent Title (中): 薄膜晶体管源漏电流建模方法及设备
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Application No.: US12201457Application Date: 2008-08-29
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Publication No.: US08095343B2Publication Date: 2012-01-10
- Inventor: Jae Heon Shin , Chi Sun Hwang , Min Ki Ryu , Woo Seok Cheong , Hye Yong Chu
- Applicant: Jae Heon Shin , Chi Sun Hwang , Min Ki Ryu , Woo Seok Cheong , Hye Yong Chu
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Agency: Rabin & Berdo, P.C.
- Priority: KR10-2007-0132724 20071217
- Main IPC: G06F17/11
- IPC: G06F17/11

Abstract:
Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.
Public/Granted literature
- US20090157372A1 METHOD AND APPARATUS FOR MODELING SOURCE-DRAIN CURRENT OF THIN FILM TRANSISTOR Public/Granted day:2009-06-18
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