Invention Grant
US08095809B2 System and method for reducing power consumption of a transistor-based circuit having multiple operational modes characterized by different power consumption level 有权
用于降低具有由不同功耗水平表征的多个操作模式的基于晶体管的电路的功耗的系统和方法

  • Patent Title: System and method for reducing power consumption of a transistor-based circuit having multiple operational modes characterized by different power consumption level
  • Patent Title (中): 用于降低具有由不同功耗水平表征的多个操作模式的基于晶体管的电路的功耗的系统和方法
  • Application No.: US11910069
    Application Date: 2005-03-30
  • Publication No.: US08095809B2
    Publication Date: 2012-01-10
  • Inventor: Michael PrielDan KuzminAnton Rozen
  • Applicant: Michael PrielDan KuzminAnton Rozen
  • Applicant Address: US TX Austin
  • Assignee: Freescale Semiconductor, Inc.
  • Current Assignee: Freescale Semiconductor, Inc.
  • Current Assignee Address: US TX Austin
  • International Application: PCT/IB2005/000830 WO 20050330
  • International Announcement: WO2006/103484 WO 20061005
  • Main IPC: G06F1/32
  • IPC: G06F1/32 G06F1/00
System and method for reducing power consumption of a transistor-based circuit having multiple operational modes characterized by different power consumption level
Abstract:
A method for reducing power consumption, and a system having power reduction capabilities, the method includes: storing, at a first circuit, data representative of a state of a second circuit, entering a low power mode, exiting low power mode, providing a default data value to the second circuit after exiting from the low power mode, and selectively providing data from the first circuit to the second circuit in response to the value of data and to a characteristic of a third circuit coupled to the first and second circuits.
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