Invention Grant
- Patent Title: Integrated circuit chip design flow methodology including insertion of on-chip or scribe line wireless process monitoring and feedback circuitry
- Patent Title (中): 集成电路芯片设计流程方法,包括插入片上或划线无线过程监控和反馈电路
-
Application No.: US12343686Application Date: 2008-12-24
-
Publication No.: US08097474B2Publication Date: 2012-01-17
- Inventor: Theodoros Anemikos , Ezra D. B. Hall , Sebastian T. Ventrone
- Applicant: Theodoros Anemikos , Ezra D. B. Hall , Sebastian T. Ventrone
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Gibb I.P. Law Firm, LLC
- Main IPC: H01L21/66
- IPC: H01L21/66

Abstract:
Disclosed are embodiments of a design and manufacturing system and an associated method that allow for design analysis and for insertion, during wafer manufacture, of intra-process monitoring circuitry. These embodiments use a library of pre-qualified intra-process monitoring circuits and a cross-correlation table that links different monitoring circuits with different IC chip components. Specifically, these embodiments analyze integrated circuit chip design data to identify the components designed into the chip. Then, one or more intra-process monitoring circuits are selected from the library and the design data is modified to include the selected monitoring circuit(s).
Public/Granted literature
Information query
IPC分类: