Invention Grant
US08097943B2 Semiconductor device and method of forming wafer level ground plane and power ring
有权
半导体器件及其形成晶圆级接地面和电源环的方法
- Patent Title: Semiconductor device and method of forming wafer level ground plane and power ring
- Patent Title (中): 半导体器件及其形成晶圆级接地面和电源环的方法
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Application No.: US12905797Application Date: 2010-10-15
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Publication No.: US08097943B2Publication Date: 2012-01-17
- Inventor: Guruprasad G. Badakere , Zigmund R. Camacho , Lionel Chien Hui Tay
- Applicant: Guruprasad G. Badakere , Zigmund R. Camacho , Lionel Chien Hui Tay
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/06
- IPC: H01L23/06 ; H01L23/48 ; H01L23/52 ; H01L23/04 ; H01L23/13 ; H01L23/482 ; H01L23/485

Abstract:
A semiconductor die has active circuits formed on its active surface. Contact pads are formed on the active surface of the semiconductor die and coupled to the active circuits. A die extension region is formed around a periphery of the semiconductor die. Conductive through hole vias (THV) are formed in the die extension region. A wafer level conductive plane or ring is formed on a center area of the active surface. The conductive plane or ring is connected to a first contact pad to provide a first power supply potential to the active circuits, and is electrically connected to a first conductive THV. A conductive ring is formed partially around a perimeter of the conductive plane or ring and connected to a second contact pad for providing a second power supply potential to the active circuits. The conductive ring is electrically connected to a second THV.
Public/Granted literature
- US20110024903A1 Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring Public/Granted day:2011-02-03
Information query
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