Invention Grant
- Patent Title: Systems and methods for erasing a memory
- Patent Title (中): 擦除内存的系统和方法
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Application No.: US12271185Application Date: 2008-11-14
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Publication No.: US08098530B2Publication Date: 2012-01-17
- Inventor: Vishal Sarin
- Applicant: Vishal Sarin
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/10 ; G11C16/14 ; G11C16/16

Abstract:
Methods of erasing a memory, methods of operating a memory, memory devices, and systems. In one such method, an erase block is erased to an intermediate erase voltage before it is erased to a final erase voltage, such as to tighten an erase distribution. Faster erasing cells have their erasing throttled using a positive bias on their access line once a particular number of cells coupled to the access line are erased to the intermediate erase voltage.
Public/Granted literature
- US20100124127A1 SYSTEMS AND METHODS FOR ERASING A MEMORY Public/Granted day:2010-05-20
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