One or two Serializer/Deserializer (SerDes) modules are used to measure the time between two pulses with high resolution. A PLL inside a SerDes block is locked to a reference clock and an input signal is passed through a storage element to create a serial data stream that is converted into a parallel data stream by a demultiplexer inside the SerDes. The parallel data is stored in a bit logic unit that compares the parallel data to a second parallel data obtained in similar fashion in another SerDes from a second input signal. The time between the two pulses is then calculated as the number of cycles in the serial data stream that corresponds to the number of bits between the positions of the two events.