Invention Grant
- Patent Title: Two-step simulation methodology for aging simulations
- Patent Title (中): 老化模拟的两步模拟方法
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Application No.: US11869522Application Date: 2007-10-09
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Publication No.: US08099269B2Publication Date: 2012-01-17
- Inventor: Rasit O. Topaloglu , Jung-Suk Goo
- Applicant: Rasit O. Topaloglu , Jung-Suk Goo
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Ditthavong Mori & Steiner, P.C.
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
The present invention is a method and system for simulating the aging process of a circuit. A two-step process is employed whereby, in a first simulation step, a simulation is conducted to obtain node voltages for the original circuit and the node voltages are stored in a file. In the second step, a subsequent simulation is run after transistors of the circuit are replaced by aging subcircuits, which contain aging models, and initial node voltages are updated. A script is used to set the bias voltage inputs for the aging models using the node voltages stored in the file from the first step. With more accurate bias voltage inputs for the aging models, the aging simulations are conducted to compute the circuit degradation.
Public/Granted literature
- US20090094013A1 TWO-STEP SIMULATION METHODOLOGY FOR AGING SIMULATIONS Public/Granted day:2009-04-09
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