Invention Grant
- Patent Title: Galois field multiplier system and method
- Patent Title (中): 伽罗瓦域乘法系统和方法
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Application No.: US11961494Application Date: 2007-12-20
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Publication No.: US08099655B1Publication Date: 2012-01-17
- Inventor: Kuan Hua Tan , Amr Wassal
- Applicant: Kuan Hua Tan , Amr Wassal
- Applicant Address: US CA Sunnyvale
- Assignee: PMC-Sierra US, Inc.
- Current Assignee: PMC-Sierra US, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Borden Ladner Gervais LLP
- Agent Curtis B. Behmann
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
A Galois Field multiplier circuit for multiplying two polynomials (multiplicands). The multiplier circuit can use any arbitrary primitive polynomial to preserve the Galois Field. The multiplier circuit includes at least one logic unit that receives as a first input one of the multiplicands and shift the multiplicand in question by 1 bit to the left. The logic unit receives as a second input a pre-determined primitive polynomial and multiplies the primitive polynomial by the highest bit of the multiplicand received at the other input of the logic unit. The bit-shifted multiplicand is XOR-ed with the primitive polynomial multiplied the highest bit of the multiplicand and the result of the XOR operation is provided to a second logic circuit that completes the multiplication of the two polynomials.
Information query
IPC分类: