Invention Grant
- Patent Title: Filtering of small values for the verification of integrated circuits
- Patent Title (中): 过滤用于验证集成电路的小值
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Application No.: US12477846Application Date: 2009-06-03
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Publication No.: US08099699B2Publication Date: 2012-01-17
- Inventor: François Charlet , Mathias Silvant
- Applicant: François Charlet , Mathias Silvant
- Applicant Address: FR Voiron
- Assignee: Edxact
- Current Assignee: Edxact
- Current Assignee Address: FR Voiron
- Agency: Nixon Peabody LLP
- Priority: FR0853661 20080603
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50

Abstract:
The invention relates to a method of simulating an electronic circuit, represented in the form of masks and connections, comprising: a) the definition of the circuit in the form of a first list (140) of electrical components and their interconnections, b) the separation of the data of this first list into a first sub-assembly (170) of components to be modified by a filtering step, and into a second sub-assembly (160) of components not to be modified by this filtering step, c) the filtering of the data of the first sub-assembly (170) of components, d) the definition of the circuit in the form of a second list (190) of electrical components and their interconnections, from the data of the second sub-assembly (160) and the data resulting from step c), e) the simulation (195) of the circuit by means of this second list, f) if the result of the simulation is satisfactory, the manufacture of the circuit.
Public/Granted literature
- US20100036516A1 FILTERING OF SMALL VALUES FOR THE VERIFICATION OF INTEGRATED CIRCUITS Public/Granted day:2010-02-11
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