Invention Grant
- Patent Title: Method for tracking delay locked loop clock
- Patent Title (中): 跟踪延迟锁定环时钟的方法
-
Application No.: US12717104Application Date: 2010-03-03
-
Publication No.: US08106692B2Publication Date: 2012-01-31
- Inventor: Chung-Zen Chen
- Applicant: Chung-Zen Chen
- Applicant Address: TW Hsinchu
- Assignee: Elite Semiconductor Memory Technology Inc.
- Current Assignee: Elite Semiconductor Memory Technology Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A method for tracking a delay locked loop (DLL) clock is described. An external clock signal is allowed to pass through delay cells of a DLL during a first period of the external clock signal when a transition edge of a track signal applied on the DLL occurs. Then, when a transition edge of a sensing signal applied on the DLL occurs at a start of a second period of the external clock signal, the external clock signal is inhibited to pass through the delay cells and the number of the delay cells through which the external signal pass during the first period of the external clock signal is counted. When a reset signal is asserted, a delay time of each delay cell is reset such that a ratio of the delay time to the period of the external clock signal is kept from 10% to 15%.
Public/Granted literature
- US20110215850A1 METHOD FOR TRACKING DELAY LOCKED LOOP CLOCK Public/Granted day:2011-09-08
Information query