Invention Grant
US08108163B2 Power supply noise analysis method, apparatus and program for electronic circuit board 有权
电源噪声分析方法,电子电路板的设备和程序

  • Patent Title: Power supply noise analysis method, apparatus and program for electronic circuit board
  • Patent Title (中): 电源噪声分析方法,电子电路板的设备和程序
  • Application No.: US12401065
    Application Date: 2009-03-10
  • Publication No.: US08108163B2
    Publication Date: 2012-01-31
  • Inventor: Kazuhiro Kashiwakura
  • Applicant: Kazuhiro Kashiwakura
  • Applicant Address: JP Tokyo
  • Assignee: NEC Corporation
  • Current Assignee: NEC Corporation
  • Current Assignee Address: JP Tokyo
  • Priority: JP2008-061590 20080311
  • Main IPC: G01R25/00
  • IPC: G01R25/00 G01R27/00 G06F17/50
Power supply noise analysis method, apparatus and program for electronic circuit board
Abstract:
Disclosed is a method including: calculating power supply input impedance of the LSI from the number of output buffers of the LSI, output impedance of an output buffer, signal characteristic impedance and characteristic impedance of power supply/ground of an LSI terminal, a package, and a chip terminal part, characteristic impedance of wiring connected to an LSI output terminal, and output signal damping resistance calculating a reflected voltage of power supply noise at a semiconductor device mounted on an electronic circuit board, based on impedance characteristic between a power supply and ground of the semiconductor device; and analyzing power supply noise of the electronic circuit board, based on the reflected voltage of the power supply noise at the semiconductor device.
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