Invention Grant
- Patent Title: Method and apparatus for operational-level functional and degradation fault analysis
- Patent Title (中): 操作级功能和劣化故障分析的方法和装置
-
Application No.: US12753166Application Date: 2010-04-02
-
Publication No.: US08108728B2Publication Date: 2012-01-31
- Inventor: Dipankar Das , Partha P. Chakrabarti , Purnendu Sinha
- Applicant: Dipankar Das , Partha P. Chakrabarti , Purnendu Sinha
- Applicant Address: US MI Detroit IN West Bengal
- Assignee: GM Global Technology Operations LLC,Indian Institute of Technology Kharagpur
- Current Assignee: GM Global Technology Operations LLC,Indian Institute of Technology Kharagpur
- Current Assignee Address: US MI Detroit IN West Bengal
- Agency: Quinn Law Group, PLLC
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
An apparatus and method are provided for analyzing fault tolerance of a system, and performing “what if?” analysis for various fault-tolerant system design options. The fault tolerance analysis approach handles logical failures and quality faults emanating from loss of precision in signal values. The method can detect quality faults, which can allow systems to be built which are resilient to precision losses. Two analysis steps are provided, one static and another simulation-based, which are used in tandem to check the fault tolerance of an automotive or other system. While a simulation-based method checks fault-resilience under specific test cases and fault-scenarios, the static analysis method quickly checks all test cases and fault-scenarios. The static analysis method makes approximations while performing the analysis, and any fault detected is reproduced using the simulation-based method. All analysis operations are performed on operations-level behavioral models of the applications, thereby reducing the cost of analysis.
Public/Granted literature
- US20110246831A1 METHOD AND APPARATUS FOR OPERATIONAL-LEVEL FUNCTIONAL AND DEGRADATION FAULT ANALYSIS Public/Granted day:2011-10-06
Information query