Invention Grant
US08108741B2 Semiconductor memory device having mount test circuits and mount test method thereof
失效
具有安装测试电路及其安装测试方法的半导体存储器件
- Patent Title: Semiconductor memory device having mount test circuits and mount test method thereof
- Patent Title (中): 具有安装测试电路及其安装测试方法的半导体存储器件
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Application No.: US12219815Application Date: 2008-07-29
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Publication No.: US08108741B2Publication Date: 2012-01-31
- Inventor: Byoung-Sul Kim , Joon-Hee Lee , Kwan-Yong Jin , Seung-Hee Lee
- Applicant: Byoung-Sul Kim , Joon-Hee Lee , Kwan-Yong Jin , Seung-Hee Lee
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2007-0076383 20070730
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C7/00

Abstract:
A semiconductor memory device having a mount test circuit and a mount test method thereof are provided. The test circuit for use in a semiconductor memory device including a plurality of memory blocks may include a comparison unit for comparing test data of at least two memory blocks selected from the plurality of memory blocks, deciding whether or not the test data of the selected memory blocks are identical, and outputting a pass signal or fail signal as a flag signal; and an output selection unit for selecting any one of the selected memory blocks as an output memory block, and changing the output memory block whenever the fail signal is generated from the comparison unit, thus forming it as a data output path, which may lessen error occurrence.
Public/Granted literature
- US20090037784A1 Semiconductor memory device having mount test circuits and mount test method thereof Public/Granted day:2009-02-05
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