Invention Grant
US08108762B2 Operating method and circuit for low density parity check (LDPC) decoder 有权
低密度奇偶校验(LDPC)解码器的操作方法和电路

Operating method and circuit for low density parity check (LDPC) decoder
Abstract:
An operating method and a circuit for low density parity check (LDPC) decoders, in which original bit nodes are incorporated into check nodes for simultaneous operation. The bit node messages are generated according to the difference between the newly generated check messages and the previous check node messages. The bit node messages can be updated immediately, and the decoder throughput can be improved. The required memory of LDPC decoders can be effectively reduced, and the decoding speed can also be enhanced.
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