Invention Grant
- Patent Title: Method of forming a pattern of a semiconductor device
- Patent Title (中): 形成半导体器件的图案的方法
-
Application No.: US12132551Application Date: 2008-06-03
-
Publication No.: US08110340B2Publication Date: 2012-02-07
- Inventor: Woo Yung Jung
- Applicant: Woo Yung Jung
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: KR10-2007-140295 20071228
- Main IPC: G03F7/00
- IPC: G03F7/00 ; G03F7/26 ; G03F7/40
Abstract:
A pattern for a gate line is formed using a first photoresist pattern and a first BARC layer. A pad and patterns for a select line, which has a width that is larger than that of the gate line, are formed using a second photoresist pattern and a second BARC layer. The gate line, the pad and the select line can be formed at a same time.
Public/Granted literature
- US20090170031A1 METHOD OF FORMING A PATTERN OF A SEMICONDUCTOR DEVICE Public/Granted day:2009-07-02
Information query
