Invention Grant
US08110441B2 Method of electrically connecting a shielding layer to ground through a conductive via disposed in peripheral region around semiconductor die
有权
通过布置在半导体管芯周围的周围区域中的导电通孔将屏蔽层电连接到地的方法
- Patent Title: Method of electrically connecting a shielding layer to ground through a conductive via disposed in peripheral region around semiconductor die
- Patent Title (中): 通过布置在半导体管芯周围的周围区域中的导电通孔将屏蔽层电连接到地的方法
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Application No.: US12238007Application Date: 2008-09-25
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Publication No.: US08110441B2Publication Date: 2012-02-07
- Inventor: Harry Chandra , Flynn Carson
- Applicant: Harry Chandra , Flynn Carson
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/552 ; H01L23/34

Abstract:
A semiconductor device is made by mounting a plurality of semiconductor die to a substrate, depositing an encapsulant over the substrate and semiconductor die, forming a shielding layer over the semiconductor die, creating a channel in a peripheral region around the semiconductor die through the shielding layer, encapsulant and substrate at least to a ground plane within the substrate, depositing a conductive material in the channel, and removing a portion of the conductive material in the channel to create conductive vias in the channel which provide electrical connection between the shielding layer and ground plane. An interconnect structure is formed on the substrate and are electrically connected to the ground plane. Solder bumps are formed on a backside of the substrate opposite the semiconductor die. The shielding layer is connected to a ground point through the conductive via, ground plane, interconnect structure, and solder bumps of the substrate.
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