Invention Grant
- Patent Title: Printed TFT and TFT array with self-aligned gate
-
Application No.: US11959956Application Date: 2007-12-19
-
Publication No.: US08110450B2Publication Date: 2012-02-07
- Inventor: Robert A. Street
- Applicant: Robert A. Street
- Applicant Address: US CA Palo Alto
- Assignee: Palo Alto Research Center Incorporated
- Current Assignee: Palo Alto Research Center Incorporated
- Current Assignee Address: US CA Palo Alto
- Agency: Fay Sharpe LLP
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method is used to form a self-aligning thin film transistor. The thin film transistor includes a gate contact formed with a state-switchable material, and a dielectric layer to isolate the gate contact. A source-drain layer, which includes a source contact, and a drain contact are formed with a source-drain material. An area of the gate contact is exposed to a form of energy, wherein the energy transforms a portion of the state switchable material from a non-conductive material to a conductive material, the conductive portion defining the gate contact. A semiconductor material is formed between the source contact and the drain contact.
Public/Granted literature
- US20090159971A1 PRINTED TFT AND TFT ARRAY WITH SELF-ALIGNED GATE Public/Granted day:2009-06-25
Information query
IPC分类: