Invention Grant
- Patent Title: Methods of forming drain extended transistors
- Patent Title (中): 形成漏极扩展晶体管的方法
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Application No.: US12552471Application Date: 2009-09-02
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Publication No.: US08110454B2Publication Date: 2012-02-07
- Inventor: Sameer P. Pendharkar
- Applicant: Sameer P. Pendharkar
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L29/72
- IPC: H01L29/72
Abstract:
A transistor comprises a source region of a first conductivity type and electrically communicating with a first semiconductor region. The transistor also comprises a drain region of the first conductivity type and electrically communicating with a second semiconductor region that differs from the first semiconductor region. An interface exists between the first semiconductor region and the second semiconductor region. The transistor also comprises a voltage tap region comprising at least a portion located in a position that is closer to the interface than the drain region. A mixed technology circuit is also described.
Public/Granted literature
- US20090325352A1 METHODS OF FORMING DRAIN EXTENDED TRANSISTORS Public/Granted day:2009-12-31
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