SOI protection for buried plate implant and DT bottle ETCH

Invention Grant

US08110464B2 SOI protection for buried plate implant and DT bottle ETCH 失效

Title translation: 掩埋板植入物和DT瓶ETCH的SOI保护

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Patent Title: SOI protection for buried plate implant and DT bottle ETCH
Patent Title (中): 掩埋板植入物和DT瓶ETCH的SOI保护
Application No.: US12048291

Application Date: 2008-03-14
Publication No.: US08110464B2

Publication Date: 2012-02-07
Inventor: Thomas W. Dyer , Herbert L. Ho , Ravi M. Todi
Applicant: Thomas W. Dyer , Herbert L. Ho , Ravi M. Todi
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agent Joseph P. Abate; Howard M. Cohn
Main IPC: H01L21/8242
IPC: H01L21/8242

SOI protection for buried plate implant and DT bottle ETCH

Abstract:

An SOI layer has an initial trench extending therethrough, prior to deep trench etch. An oxidation step, such as thermal oxidation is performed to form a band of oxide on an inner periphery of the SOI layer to protect it during a subsequent RIE step for forming a deep trench. The initial trench may stop on BOX underlying the SOI. The band of oxide may also protect the SOI during buried plate implant or gas phase doping.

Abstract(Chinese):

在深沟槽蚀刻之前，SOI层具有穿过其延伸的初始沟槽。执行氧化步骤，例如热氧化，以在SOI层的内周上形成氧化带，以在随后的用于形成深沟槽的RIE步骤中保护它。初始沟槽可能停在SOI上的BOX上。在掩埋板植入或气相掺杂期间，氧化物带也可以保护SOI。

Public/Granted literature

US20090230508A1 SOI PROTECTION FOR BURIED PLATE IMPLANT AND DT BOTTLE ETCH Public/Granted day:2009-09-17

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8239	........存储器结构
H01L21/8242	.........动态随机存取存储结构（DRAM）